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>Diodes pointing towards FB means you get the greater of the two feedback signals, diodes pointing away from FB (wth a pull-up resistors) means you get the lesser of the two feedbacks signals. i see this now (in ltspice.) thanks for saving me a frustratingly stupid board revision. >Even the small amount of ripple that gets through your low-pass filter will be hugely amplified by your error amplifiers, resulting in a bunch of output ripple. are PWM DACs more difficult than i'm perceiving? settling time doesn't really matter to me. 100 khz PWM through a 30K and 100nF RC filter should yield roughly 1.65 mv ripple peak to peak on a 3.3V input. that's close to 11 bits? afaik DACs don't have output ripple but shouldn't this ripple be functionally the same as the precision/accuracy of a 10-11 bit DAC? >Seems like Q1A is a bit superfluous Q1A exists to shut off the charging power path no matter what happens. i selected them to withstand VCC (20V from USB-C.) normal charge termination? shut off charging. buck converter fails and the output rail sees 20V? shut off charging. >If it’s tied to ground in a single-supply circuit, it will clip any negative voltages i don't want to charge a dead battery since it's unsafe. off-board comparators check for a minimum voltage, like 3.0V for an 18650. a reverse polarity cell would read 0V, as would an absent cell. a dead cell would read <3V. comparators trigger SD LATCH, no current flow can occur because Q1A/Q1B are held off.⏱ 38m↩